The quest to integrate an increasing number of advanced features into battery-powered mobile devices is driving the need for high-performance power-conversion techniques to extend battery life, while minimizing volume, weight and cost. The focus of this thesis is the power-delivery path from the battery to the load, which typically consists of a combination of analog and digital ICs. The main objective is to develop micro-power fully-digital and mixed-signal control schemes, as well as efficiency improvement techniques that demonstrate the advantages and future potential of digital control. The first part of the thesis deals with implementation challenges for high-performance control-loops, where both digital voltage-mode and mixed-signal current-mode dc-dc converter designs are presented. The second part of the thesis is dedicated to efficiency improvement/optimization in low-power integrated dc-dc converters. The main contributions of this thesis include a self-calibrated digital pulse-width modulator architecture with a current consumption of only 2.56 μA/MHz, as well as a compatible spread spectrum technique for reducing electromagnetic interference by up to 23 dB. A mixed-signal peak current-mode control scheme is presented, with three new low-power architectures, each having distinct advantages. One of these architectures is demonstrated on a custom CMOS IC, which achieves a transient-response time of only 4 μs for V_out = 1 V. Two automatic power-stage optimization schemes are demonstrated using two power-stage ICs, where a peak efficiency of 91.4% is achieved at 4 MHz.